;Stazeno z www.HW.cz 
;	              Autorem tohoto SW je STEHLIK PETR - SOLVEX - solvex@HW.cz
;******************************************************************************
;       petr.stehlik@atlas.cz
;       Obsluha PCF 8574 - 8. bitovy I/O I2C EXPANDER 
;
; OBSLUHA PCF 8574, ZAJISTUJE PRECTENI A ZAPIS NA PORT PCF 8574
; PRO SPRAVNOU FUNKCI JE TREBA VYHRADIT 1 BAJT PRO PROMENOU " FADDR "
; DALE NADEFINOVAT VYVODY PROCESORU NA KTERYCH JE PROVADENA KOMUNIKACE I2C
; volne k pouziti a modifikacim i bez souhlasu autora
; PROGRAM VZNIKL UPRAVOU RUTIN PRO 2464
;
;*****************************************************************************


;******************************************************************************
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


;------------------------------------------------
;CTENI portu z PCF 8574
;FADDR= PEVNA CAST ADREST PRVKU PRO I2C KOMUNIKACI
;VSTUP:	DPTR=ADRESA PRVKU, VOLITELNA CAST ADRESY PRVKU PRO I2C KOMUNIKACI
;VYSTUP:  ACC=DATA
;
IO_READ:
		call	start_I2C
		jc	Xx45		; abort if bus not available
	MOV	A,DPL
		rl	a		; programmable address to bits 3:1
		orl	a,FADDR		; add fixed address
		setb	acc.0		; specify read operation
		call	shout		; send device address
		jc	Xx44		; abort if no acknowledge

		call	shin		; receive data byte
		call	NAK		; do not acknowledge byte
		clr	c		; clear error flag
	Xx44:
		call	stop_I2C
	Xx45:
		ret
;-----------------------------------------------------------------------
;ZAPIS NA PORT PCF 8574
;VSTUP:	DPTR=ADRESA PRVKU
;VYSTUP: ACC=DATA
IO_WRITE:

		call	start_I2C
		jc	Wx45		; abort if bus not available
	PUSH	ACC
	MOV	A,DPL
		rl	a		; programmable address to bits 3:1
		orl	a,FADDR		; add fixed address
		CLR	acc.0		; specify WRITE operation
		call	shout		; send device address
	POP	ACC
		jc	Wx44		; abort if no acknowledge
		call	shout		; receive data byte
		call	NAK		; do not acknowledge byte
		clr	c		; clear error flag
	Wx44:
		call	stop_I2C
	Wx45:
		ret

;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
start_I2C:

	; Send START, defined as high-to-low SDA with SCL high.
	; Return with SCL, SDA low.
	; Returns CY set if bus is not available.

		setb	SDA
		setb	SCL

		; Verify bus available.

		jnb	SDA, x40	; jump if not high
		jnb	SCL, x40	; jump if not high

		nop			; enforce setup delay and cycle delay
		clr	SDA
		nop			; enforce hold delay
		nop			;
		nop			;
		nop			;
		nop			;
		clr	SCL

		clr	c		; clear error flag
		jmp	x41
	x40:
		setb	c		; set error flag
	x41:
		ret

stop_I2C:

	; Send STOP, defined as low-to-high SDA with SCL high.
	; SCL expected low on entry. Return with SCL, SDA high.

		clr	SDA
		nop			; enforce SCL low and data setup
		nop
		setb	SCL
		nop			; enforce setup delay
		nop			;
		nop			;
		nop			;
		nop			;
		setb	SDA
		ret


shout:

	; Shift out a byte to the AT24Cxx, most significant bit first.
	; SCL, SDA expected low on entry. Return with SCL low.
	; Called with data to send in A.
	; Returns CY set to indicate failure by slave to acknowledge.
	; Destroys A.

		push	b
		mov	b, #8		; bit counter
	x42:
		rlc	a		; move bit into CY
		mov	SDA, c		; output bit
		nop			; enforce SCL low and data setup
		setb	SCL		; raise clock
		nop			; enforce SCL high
		nop			;
		nop			;
		nop			;
		clr	SCL		; drop clock
		djnz	b, x42		; next bit

		setb	SDA		; release SDA for ACK
		nop			; enforce SCL low and tAA
		nop			;
		setb	SCL		; raise ACK clock
		nop			; enforce SCL high
		nop			;
		nop			;
		nop			;
		mov	c, SDA		; get ACK bit
		clr	SCL		; drop ACK clock

		pop	b
		ret


shin:

	; Shift in a byte from the AT24Cxx, most significant bit first.
	; SCL expected low on entry. Return with SCL low.
	; Returns received data byte in A.

		setb	SDA		; make SDA an input

		push	b
		mov	b, #8		; bit count
	x43:
		nop			; enforce SCL low and data setup
		nop			;
		nop			;
		setb	SCL		; raise clock
		nop			; enforce SCL high
		nop			;
		mov	c, SDA		; input bit
		rlc	a		; move bit into byte
		clr	SCL		; drop clock
		djnz	b, x43		; next bit

		pop	b
		ret


ACK:

	; Clock out an acknowledge bit (low).
	; SCL expected low on entry. Return with SCL, SDA low.

		clr	SDA		; ACK bit
		nop			; enforce SCL low and data setup
		nop			;
		setb	SCL		; raise clock
		nop			; enforce SCL high
		nop			;
ACK1:		nop			;
		nop			;
		clr	SCL		; drop clock
		ret


NAK:

	; Clock out a negative acknowledge bit (high).
	; SCL expected low on entry. Return with SCL low, SDA high.

		setb	SDA		; NAK bit
		nop			; enforce SCL low and data setup
		nop			;
		setb	SCL		; raise clock
		LJMP	ACK1

;Stazeno z www.HW.cz 
;Autorem tohoto SW je STEHLIK PETR - SOLVEX - solvex@HW.cz
;******************************************************************************

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